Work E-mail: srdas@uOttawa.ca
The next generation of integrated circuitry, featuring reconfigurability, selfrepair, fault-tolerance and self-manageability relies on chips that can effectively self-test. The paper "Fault Tolerant Systems Design in VLSI Using Data Compression Under Constraints of Failure Probabilities," published in the December 2001 issue of IEEE Transactions on Instrumentation and Measurement by Sunil R. Das, Chittoor V. Ramamoorthy, Mansour H. Assaf, Emil M. Petriu and Wen-Ben Jone is a powerful reference for professionals who develop these new chips. The paper offers a lucid case for the importance of response data compaction, as well as an extensive overview of the various built-in self-test (BIST) methods available.
Sunil R. Das has published extensively in areas including switching and automata theory, digital logic design, threshold logic, fault-tolerant computing, graph theory and microprogramming and microarchitecture. A Fellow of the IEEE, the Canadian Academy of Engineering and the Society for Design and Process Science, he is a member of numerous IEEE societies as well as the Association for Computing Machinery. His honours include the IEEE Computer Society's Technical Achievement Award and Meritorious Service Award, and he was named a Golden Core Member of the Society in 1998. He is currently a professor of electrical and computer engineering at the University of Ottawa's School of Electrical Engineering and Computer Science, in Ottawa, Ontario, Canada.